Operator DFRxMeta

Operator Library: Hardware Platform

This operator represents a logical metadata reception link over a QSFP28 fiber port. The link uses specific fiber lanes within the selected port and receives metadata on the output O from another frame grabber. The status of the RX PHY is provided on the output LinkUp.

The DFRxMeta operator can be used only if the FiberProtocol0 and FiberProtocol1 parameters in the AppletProperties operator are set to DataForwarding. If the FiberProtocol0 and FiberProtocol1 parameters in the AppletProperties operator are set to CoF, the Design Rules Check (DRC) provides an error message and the DFRxMeta operator usage is blocked.

Each DFRxMeta operator can use only one lane within a QSFP28 port to receive metadata. Therefore, a single QSFP28 port can support up to four DFRxMeta operators (one per lane). The operator is designed to carry high-priority metadata, which is typically very small in size.

A QSFP28 fiber port provides a total bandwidth of 100 Gbit/s, divided across four lanes. Each lane operates at 25 Gbit/s. Thus, the operator is running at 25 Gbit/s.

The operator can share its allocated lane with the DFRxData operator without any conflict. However, lane sharing between multiple DFRxMeta operators is not allowed.

The DFRxMeta operator does not require a special protocol. It serves as the endpoint of a logical link between two frame grabbers: DFTxMeta (source, FG 1) and DFRxMeta (sink, FG 2). The link settings must be identical on both sides, including the QSFP28 port and lane configuration. Since the operator is meant for transporting small chunks of metadata and metadata has no image structure, the link protocol is VALT_PIXEL0D.

[Note] Meta Data Has Higher Priority

The metadata channel has higher priority than the data channel from the DFRxData operator. If both channels are waiting to receive data, the metadata will be processed first.

The metadata channel can't be paused or stopped. In this sense, the O output should be considered an infinite source. The receiver must process all metadata immediately; otherwise, the data will be lost. This behavior is due to the channel’s high-priority transmission over the fiber link. The metadata channel offers extremely low latency and minimal jitter (less than 10 ns, caused only by clock domain crossings). In addition to metadata transport, you can use the channel also to transmit precise timestamps or implement system-wide synchronization.

For more details about data forwarding, see 'Data Forwarding with imaFlex 2 Dual 100 Frame Grabbers'.

Available for Hardware Platform
imaFlex 2 Dual 100

Resources

The operator mirrors the FiberConnection parameter setting into the FPGA Device Resources dialog as read-only parameters. You can see the FPGA device resources, if you open the FPGA Device Resources dialog from the Analysis menu. The device resources are read-only:

FPGA Device Resources

Figure 426. FPGA Device Resources


Depending on the allocated port, the resource is of the type Port[0] DF RX Meta Lane or of the type Port[1] DF RX Meta Lane with the index range from 0 to 3.

I/O Properties

Property Value
Operator Type M
Output Links O, metadata output, not stoppable
LinkUp, indicates link status

Supported Link Format

Link Parameter Output Link O Output Link LinkUp
Bit Width 56 1
Arithmetic unsigned unsigned
Parallelism 1 1
Kernel Columns 1 1
Kernel Rows 1 1
Img Protocol {VALT_PIXEL0D} {VALT_SIGNAL}
Color Format VAF_GRAY VAF_GRAY
Color Flavor FL_NONE FL_NONE
Max. Img Width any (default: 16777216) This parameter is ignored during operation.
Max. Img Height any (default: 16777216) This parameter is ignored during operation.

The O link delivers the received metadata to VisualApplets. The LinkUp link indicates the connection status: When LinkUp is active, the paired TX side and the RX side are both ready to transmit and receive data, meaning the link is trained and operational.

Parameters

FiberConnection
Type Static Write parameter
Default port_0_lane_0
Range {port_0_lane_0, port_0_lane_1, port_0_lane_2, port_0_lane_3, port_1_lane_0, port_1_lane_1, port_1_lane_2, port_1_lane_3}

This parameter specifies the QSFP28 fiber port and lanes used by the DFRxMeta operator to receive data.

The selected QSFP28 port can be used only if the FiberProtocol parameter in the AppletProperties operator for that port is set to DataForwarding and not to CoF.

If FiberProtocol is set to CoF and the DFRxMeta operator attempts to map to that fiber port, the Design Rule Check (DRC) will generate an error message. In this case, the FiberConnection parameter will be marked as conflicted (red), and hovering over it will display a quick-tip help message explaining the conflict.

Only one DFRxMeta operator can use the same hardware QSFP28 port on the same lane. Mappings between multiple operators must be unique across the entire design.

Examples of Use

The use of operator DFRxMeta is shown in the following examples: